"RFIC circuits are critical and challenging components of today's advanced mixed-signal SoCs," said Sandeep Mehndiratta, Virtuoso product marketing group director at Cadence. In addition, Cadence has developed a toolbox for MATLAB that allows designers to access their simulation results in MATLAB for advanced visualization and post-processing. "Because Cadence integrated Virtuoso Multi-Mode Simulation with MATLAB and Simulink, RFIC designers may insert their block schematics and post-layout netlist directly in the system-level block diagram and use co-simulation to verify that the implementation meets system-level specifications." "RF system designers use MATLAB and Simulink for system design and refining specifications for each RF block in the context of the system," said Ken Karnofsky, director of signal processing and communications marketing, The MathWorks. The Cadence RFIC solution provides an interactive link between system design and circuit design by integrating with Simulink from The MathWorks. Virtuoso RF Designer integrates seamlessly into the Virtuoso front-end and leverages Cadence's patented electromagnetic analysis technology to accelerate and accommodate large designs found in today's RFICs and System-on-Chip (SoC).
SPECTRE RF TOOLBOX VERIFICATION
Virtuoso RF Designer offers designers advanced verification capabilities for faster electromagnetic analysis of complex structures and geometries-all within a single design flow, accelerating chip finishing and verification. The complete solution includes the Cadence Virtuoso RF Designer, which brings a full-wave fast planar electromagnetic (EM) field solver to the RF/wireless designer's desktop. It improves time to market and overall design costs through faster and more accurate verification that reduces design turnaround time and expensive silicon respins. Based on the Virtuoso custom design platform, this solution enables designers to deal with the challenge of integrating RF with analog/mixed-signal baseband, and the emerging need for RFIC-focused electromagnetic analysis. This technology complements a complete manufacturability-aware solution from Cadence for design, implementation and verification of RF integrated circuits (RFICs). We expect this new technology to improve the productivity of our engineers and reduce our time to market." "When we ran Spectre with turbo technology and accurate parasitic reduction on some of our leading-edge analog and RF circuits, simulation time was reduced by more than six times without any accuracy degradation. "We design high-performance communication front-ends for wireless, wired, and fiber optics physical layers in advanced CMOS process nodes," said Emad Afifi, vice president of Engineering at Ensphere Solutions, Inc. The new turbo technology is easy to learn and use for someone familiar with using the Virtuoso Spectre simulator.
"These sampled-RF circuits have enough moving parts to be a convergence challenge for any simulator. "As developers and IP providers of some of the most advanced RFIC designs, we have found that Virtuoso Spectre with turbo technology delivered six times performance improvement for RF analysis of some of our most complex RF analog circuits, without any compromise of accuracy," said Tom Riley, CTO at Kaben Wireless Silicon. The result is performance improvements of two to five times-sometimes greater-for analysis and verification of large RF circuits targeting advanced CMOS process nodes, and with no degradation in accuracy.
SPECTRE RF TOOLBOX SIMULATOR
Cadence has added the "turbo" technology it recently brought to the Virtuoso® Spectre® Circuit Simulator to its RF analysis. introduced a new simulation technology to address the challenges of verifying wireless integrated circuits implemented in advanced CMOS process nodes.
Product News Cadence Enhances RF Verification With High-Performance 'Turbo' Technology and Comprehensive Electromagnetic AnalysisĬadence Design Systems, Inc.
SPECTRE RF TOOLBOX ARCHIVE
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